It is known that, in an IC device such as using CMOS, the amount of heat generation will change with the change of an operational frequency. Such temperature changes affect the performance of the IC device, including a signal propagation delay time. Therefore, a built-in temperature compensation circuit is sometimes used in an IC device such as an IC delay circuit to maintain the amount of heat generation constant for varying operational frequencies. Typically, such a temperature compensation circuit in the IC delay circuit includes a heater.
FIG. 4 shows an example of conventional IC delay circuit having a temperature compensation circuit. The delay circuit includes a heater 10, a set-reset (R/S) flip-flop 11, an OR circuit 12 and a delay element 20. The delay element is usually formed of a plurality of CMOS gates. The delay element 20 provides a predetermined delay time to an input signal CLK-A given at an IN terminal and generates the delayed output signal at an OUT terminal.
In this arrangement, the heater 10 is turned on when an input signal CLK-A is not provided so that the heater 10 consumes the same amount of power that would be consumed by the delay element 20 if the input signal CLK-A is with its maximum operational frequency. When the input signal CLK-A is provided to the input terminal of the delay circuit, the R/S flip-flop 11 is reset by the input signal CLK-A to make the heater 10 off. Then, after the delay time determined by the delay element 20, the delayed signal CLK-A returns to the R/S flip-flop 11 through the OR circuit 12 to set the heater 10 on again.
Therefore, in this temperature compensation circuit, the higher the frequency of the input signal CLK-A, the longer it becomes the off period of the heater 10. Thus, in this arrangement, the overall power consumption, ill combination of the heater 10 and the delay element 20, is controlled to remain constant.
FIGS. 5a-5b show the operations of the heater 10 of FIG. 4 when the input signals CLK-A with repetition cycles T and 2T, respectively, are input to the IN terminal. When the input signal CLK-A is 2T cycle (FIG. 5b), in contrast to T cycle (FIG. 5a), the number of times the heater is turned off is decreased in half. The number of times that the heater 10 is turned off varies depending on the operational cycle of the delay element 20. Thus, the total power consumption of the heater 10 and delay element 20 remains constant. As a result, the fluctuation of delay time in the delay circuit 20 due to the temperature changes is minimized by compensating the heat generated in the delay circuit as noted above.
The foregoing operations are further explained below with reference to FIGS. 4 and 5.
(1) The input signal CLK-A is provided to the delay element 20 and the R/S flip-flop 11 through the IN terminal of the delay circuit.
(2) As is well known in the art, the R/S flip-flop 11 turns the heater 10 on when a signal is supplied to the set terminal S while it turns the heater 10 off when a signal is supplied to the reset terminal R. Thus, when the signal CLK-A is input to the reset terminal R of the R/S flip-flop 11, the heater 10 is turned off.
(3) The input signal CLK-A passing through the delay element 20 is delayed by a predetermined time provided in the delay element 20. The delayed signal CLK-A is input to the set terminal S of the R/S flip-flop 11 through the OR circuit 12, which turns the heater 10 on. The delayed signal CLK-A is also output at the OUT terminal.
(4) The delay element 20 keeps the temperature constant by means of heat generated by the heater 10 when the input signal CLK-A is not provided to the delay element 20. When the signal CLK-A is applied to the delay element 20, the heater 10 is turned off during the period of the delay time of the delay element 20 by the above procedure in (1)-(3) so that the heat dissipation in the entire delay circuit is kept constant by adding the heat generated by the delay element 20 to that of the heater 10.
The above-described method of controlling the heater 10 is effective only when the amount of heat generated by the heater 10 is equal to the amount of heat generated at the maximum frequency of the input signal CLK-A, as originally designed. However, in reality, performance of each circuit element in the IC device has a certain range of variation or deviation from that intended. For example, the heat dissipation characteristics of the heater 10 greatly varies from the designed value.
Thus, the amount of overall heat generation in the delay circuit fluctuates depending on the repetition rates of the input signal CLK-A. As a result, the delay time of the delay element 20 fluctuates accordingly. Such changes in the repetition rates of the input signal CLK-A cause temperature fluctuations, resulting in an imprecise delay time for the signal CLK-A produced by the delay element 20.